Embedded System Services

We offer a unique blend of critical components in development of an embedded systems. Our services include but not limited to design & development of hardware, software, firmware and application. We also help with OS porting, BSP, test automation and mass manufacturing support. Various companies in wireless, networking, streaming media and mobility domains is using our services. Our engineers with several vertical expertise work as an extension of your team to expedite your time-to-market, incorporate new technologies, cost-reduce your BOM, and perform rigorous testing to assure quality of your products.

We can assist our customers in following areas:

Embedded software development:

Operating system porting

LINUX, Android, DSP BIOS, VxWorks, Nucleus, FreeRTOS, TinyOS

Device drivers

Wireless: 802.11a/b/g/n MAC Driver on Linux/VxWorks, 802.11 SoftMAC, FullMAC Driver
Networking: IWARP (RDMA), Gigabit Ethernet Driver
Multimedia: V4L2, FBDev, DRM, VPBE, VPFE, Resizer, OSD, Previewer, DAC, ALSA, SLIMBus, DAIs, I2S
Others: IR, I2C, SPI, PCI, UART, eMMC, SATA, RS485, LCD, Keypad, DMA Engines, GPIO, PCMCIA, PWM, Interrupt Controllers, Timers, PLL/Clock, RFID, Barcode

Platform migration support

Qualcomm, TI, Xilinx, Freescale, Tensilica, Custom chipsets

Development, porting & optimization of middleware libraries

Wireless: Bluetooth, Zigbee, 6LowPan, Low Power Wi-Fi, Mac 802.11 & Net 802.11 protocol stack, 802.11i Security, 802.11 a/b/g/n
Multimedia: MP4, RTP, RTSP stack, RTCP, Matroska Mux/Demux, Optimization Audio/Video/Image Codes like H.264, MP3, Vorbis, WMA, JPEG etc.

Web / Mobile application / UI development

Android, iOS application development
Webpage development

Support and sustaining engineering

Provide quality support and sustaining engineering services
Continuous integration support
Experience of worldwide customer support of product

Test Automation for SoCs

Automate QA and validation process
Test automation framework & tools: Robot framework, Autotest, JUnit instrumentation class, Sikuli, MonkeyRunner

System level Validation for SoCs

Pre and post silicon validation
Products and Services Peripheral & system bring-up

VLSI IP Products

Innovations in semiconductor technology has helped serve ever increasing demand and growth in electronics industry. Improving time to market to keep pace with growing market requirements is the key to success. We at Softnuatics provide reusable, customizable and ready to use SoC building blocks in form of soft core IPs to help our customers achieve their time to market goal. We’ve been proactively working in the area of high speed serial interface IPs and have contributed to overall customer success with our Soft Core IPs and IP leveraged services. With extensive experience and expertise in specific technology domain, our team of engineers help our customers during IP integration and provide timely support for quick resolution to queries and issues.

Following is a sample list of IP building blocks we provide.

xHCI compliant USB Host controller with speed up to USB3.2×1 Gen1/Gen
USB Device controller with speed up to USB3.2×1 Gen1/Gen2
eMMC v5.1 Host controller

VLSI Services

Team Softnautics is proud to have smart working engineers with expertise in various domains of chip design cycle. We provide quality engineering services in the area of front-end design, verification, and FPGA prototyping. We have been able to repeat our success with right combination of skilled resources for architecture, coding, testing, EDA tools, methodologies, project management, and effective customer communication. Having in-house R&D team and expertise in IP-development, we can customize our services and assist customers at any stage of chip-design cycle. Softnuatics engineers carry extensive experience in various technology domains and bring value for overall success of the project with experience in working with multiple customers, managing dependencies between design, verification, back-end, and software teams working in collaboration from different geographical locations. Having expertise in standard protocols like AMBA, USB, PCIe, Ethernet, SATA, etc.. and FPGA families from Xilinx, and Intel we are capable of providing value added services with short ramp-up time.

We can assist our customers in following areas:

Front end design services:

Start from high-level specification or standard-protocol specification and build implementation level architecture details
RTL coding and Lint and CDC: project setup, scripts, report reviews, corrections and waivers
custom IP development, Reusable IP integration, IP-optimization, IP configuration and customization for optimal performance
Block-level sanity testing
Synthesis and STA

Verification services:

Develop / enhance Verification Environment (VE) architecture for standard and specific verification closer goals
Develop / enhance test-plan that’s scalable for functional coverage of low-level standard protocol, chip-level testing, system/application-level testing, h/w-s/w co-sim and h/w validation
SystemVerilog / SystemC HVL coding with standard methodologies (UVM / OVM) or work on any legacy test-bench/methodology
Develop custom BFM and agents
Execute defined test-plan with coverage and assertions based verification
Multi-level regressions based on design update and release schedule
Smart scripting for automation: run log and debug-trace parsing, error reporting
Project management for effective progress reporting with verification statistics

FPGA prototyping services

Feasibility study and prototyping set-up plan based on testing goals: accelerated verification, proof-of-concept, inter-operability testing
FPGA selection based on performance and resource needs
Off the shelf h/w selection and custom h/w development assistance
Test-plan for functional, inter-op, and stress-testing
FPGA specific RTL updates, integration with process sub-system
Debug mechanism development for quick trouble shooting
Synthesis, STA, RTL optimization to meet specific needs for FPGA
Working with inbuilt or external logic analyzers for debug
Working with exercisers and inter-op testing